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Real-Time and Scalable Zak-OTFS Receiver Processing on GPUs

arXiv eess.SPby [Submitted on 2 Apr 2026]April 3, 20262 min read1 views
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arXiv:2604.02266v1 Announce Type: new Abstract: Orthogonal time frequency space (OTFS) modulation offers superior robustness to high-mobility channels compared to conventional orthogonal frequency-division multiplexing (OFDM) waveforms. However, its explicit delay-Doppler (DD) domain representation incurs substantial signal processing complexity, especially with increased DD domain grid sizes. To address this challenge, we present a scalable, real-time Zak-OTFS receiver architecture on GPUs through hardware--algorithm co-design that exploits DD-domain channel sparsity. Our design leverages compact matrix operations for key processing stages, a branchless iterative equalizer, and a structured sparse channel matrix of the DD domain channel matrix to significantly reduce computational and mem

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Abstract:Orthogonal time frequency space (OTFS) modulation offers superior robustness to high-mobility channels compared to conventional orthogonal frequency-division multiplexing (OFDM) waveforms. However, its explicit delay-Doppler (DD) domain representation incurs substantial signal processing complexity, especially with increased DD domain grid sizes. To address this challenge, we present a scalable, real-time Zak-OTFS receiver architecture on GPUs through hardware--algorithm co-design that exploits DD-domain channel sparsity. Our design leverages compact matrix operations for key processing stages, a branchless iterative equalizer, and a structured sparse channel matrix of the DD domain channel matrix to significantly reduce computational and memory overhead. These optimizations enable low-latency processing that consistently meets the 99.9-th percentile real-time processing deadline. The proposed system achieves up to 906.52 Mbps throughput with a DD grid size of (16384,32) using 16QAM modulation over 245.76 MHz bandwidth. Extensive evaluations under a Vehicular-A channel model demonstrate strong scalability and robust performance across CPU (Intel Xeon) and multiple GPU platforms (NVIDIA Jetson Orin, RTX 6000 Ada, A100, and H200), highlighting the effectiveness of compute-aware Zak-OTFS receiver design for next-generation (NextG) high-mobility communication systems.

Comments: This work has been submitted to the IEEE for possible publication

Subjects:

Signal Processing (eess.SP); Networking and Internet Architecture (cs.NI)

Cite as: arXiv:2604.02266 [eess.SP]

(or arXiv:2604.02266v1 [eess.SP] for this version)

https://doi.org/10.48550/arXiv.2604.02266

arXiv-issued DOI via DataCite (pending registration)

Submission history

From: Chung-Hsuan Tung [view email] [v1] Thu, 2 Apr 2026 16:59:32 UTC (552 KB)

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